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S0808C1X
WCMS0808C1X
32Kx8 Static RAM
Features
* Low Voltage Range -- 4.5V-5.5V Operation * Low active power -- 275 mW (max.) * Low standby power -- 28 W (max.) * Easy memory expansion with CE and OE features * TTL-compatible inputs and outputs * Automatic power-down when deselected * CMOS for optimum speed/power LOW output enable (OE) and three-state drivers. This device has an automatic power-down feature, reducing the power consumption by 99.9% when deselected. The WCMS0808C1X is in the standard 450-mil-wide (300-mil body width) SOIC and packages. An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH.
Functional Description
The WCMS0808C1X is a high-performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active
Logic Block Diagram
Pin Configurations
Narrow SOIC Top View A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A4 A3 A2 A1 OE A0 CE I/O7 I/O6 I/O5 I/O4 I/O3
INPUTBUFFER A10 A9 A8 A7 A6 A5 A4 A3 A2 CE WE OE A 14 A 13 A 12 A 11 A1 A0 ROW DECODER
I/O0 I/O1 SENSE AMPS I/O2 I/O3 I/O4 I/O5
512x512 ARRA Y
COLUMN DECODER
POWER DOWN
I/O6 I/O7 OE A1 A2 A3 A4 WE VCC A5 A6 A7 A8 A9 A10 A11
22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8
TSOP I Top View (not to scale)
A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A14 A13 A12
WCMS0808C1X
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ..................................... -65C to +150C Ambient Temperature with Power Applied................................................... 0C to +70C Supply Voltage to Ground Potential (Pin 28 to Pin 14).................................................-0.5V to +7.0V DC Voltage Applied to Outputs in High Z State[1] ........................................ -0.5V to VCC + 0.5V DC Input Voltage[1].................................... -0.5V to VCC + 0.5V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... >200 mA
Operating Range
Range Industrial Ambient Temperature -40C to +85C VCC 5V 10%
Electrical Characteristics Over the Operating Range
WCMS0808C1X Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current VCC Operating Supply Current Automatic CE Power-Down Current-- TTL Inputs Automatic CE Power-Down Current-- CMOS Inputs GND < VI < VCC GND < VO < VCC, Output Disabled VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE > VIH, VIN > VIH or VIN < VIL, f = fMAX Max. VCC, CE > VCC - 0.3V VIN > VCC - 0.3V or VIN < 0.3V, f = 0 Test Conditions VCC = Min., IOH = -1.0 mA VCC = Min., IOL = 2.1 mA 2.2 -0.5 -0.5 -0.5 25 Min. 2.4 0.4 VCC +0.5V 0.8 +0.5 +0.5 50 Typ[2] Max. Unit V V V V A A mA
ISB1
0.3
0.5
mA
ISB2
0.1
10
A
Capacitance[3]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 6 8 Unit pF pF
Note: 1. VIL (min.) = -2.0V for pulse durations of less than 20 ns. 2. Typical specifications are the mean values measured over a large sample size across normal production process variations and are taken at nominal conditions (TA = 25C, VCC). Parameters are guaranteed by design and characterization, and not 100% tested. 3. Tested initially and after any design or process changes that may affect these parameters.
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WCMS0808C1X
AC Test Loads and Waveforms
R1 1800 5V OUTPUT 100 pF INCLUDING JIG AND SCOPE R2 990 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE R2 990 3.0V 10% GND < 5 ns R1 1800 ALL INPUT PULSES 90% 90% 10% < 5 ns
(a)
Equivalent to: THE VENIN EQUIVALENT 639 OUTPUT 1.77V
(b)
Data Retention Characteristics
Parameter VDR Description VCC for Data Retention Conditions[4] VCC = 3.0V, CE > VCC - 0.3V, VIN > VCC - 0.3V or VIN < 0.3V Min. 2.0 Typ.[2] Max. Unit V
ICCDR tCDR[3] tR[3]
Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time 0 tRC
0.1
10
A ns ns
Data Retention Waveform
DATA RETENTION MODE VCC 3.0V tCDR CE VDR > 2V 3.0V tR
Note: 4. No input may exceed VCC+0.5V.
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WCMS0808C1X
Switching Characteristics Over the Operating Range[10]
WCMS0808C1X Parameter READ CYCLE tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD WRITE tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE CYCLE[8, 9] Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High WE HIGH to Low Z[6, 7] Z[6] 5 70 60 60 0 0 50 30 0 25 ns ns ns ns ns ns ns ns ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low CE LOW to Low Z[6] Z[6] Z[6, 7] 0 70 5 25 5 25 OE HIGH to High Z[6, 7] CE HIGH to High 5 70 35 70 70 ns ns ns ns ns ns ns ns ns ns ns Description Min. Max. Unit
CE LOW to Power-Up CE HIGH to Power-Down
Notes: 5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 100-pF load capacitance. 6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 7. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage. 8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD
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WCMS0808C1X
Switching Waveforms
Read Cycle No. 1 [10,11]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
Read Cycle No. 2 [11,12]
CE tACE OE tDOE tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50%
tRC
tHZOE tHZCE DATA VALID tPD
HIGH IMPEDANCE
DATA OUT
ICC 50% ISB
Notes: 10. Device is continuously selected. OE, CE = VIL. 11. WE is HIGH for read cycle. 12. Address valid prior to or coincident with CE transition LOW.
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WCMS0808C1X
Switching Waveforms (continued)
[8,13,14]
Write Cycle No. 1 (WE Controlled)
tWC ADDRESS
CE tAW WE tSA tPWE tHA
OE tSD DATA I/O NOTE 15 tHZOE DATAIN VALID tHD
Write Cycle No. 2 (CE Controlled)
[8,13,14]
tWC ADDRESS CE tSA tAW WE tSD DATA I/O DATAIN VALID tHD tHA tSCE
Notes: 13. Data I/O is high impedance if OE = VIH. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
*
WCMS0808C1X
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, OE LOW)
[9,14]
tWC ADDRESS
CE tAW WE tSA tHA
tSD DATA I/O NOTE 15 tHZWE
Note: 15. During this period, the I/Os are in output state and input signals should not be applied.
tHD
DATAIN VALID tLZWE
Truth Table
CE H L L L WE X H L H OE X L X H Inputs/Outputs High Z Data Out Data In High Z Read Write Deselect, Output Disabled Mode Deselect/Power-Down Power Standby (ISB) Active (ICC) Active (ICC) Active (ICC)
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WCMS0808C1X
Ordering Information
Speed (ns) 70 Ordering Code WCMS0808C1X-NF70 WCMS0808C1X-TF70 Package Name N28 T28 Package Type 28-Lead 450-Mil (300-Mil Body Width) Narrow SOIC 28-Lead Thin Small Outiline Package (TSOP) Operating Range Industrial
Package Diagrams
28-Lead 450-Mil (300-Mil Body Width) SOIC, N28
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WCMS0808C1X
Package Diagrams (continued)
28-Lead Thin Small Outline Package, T28
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WCMS0808C1X
32Kx8 Static RAM
Document Title: WCMS0808C1X, 32K x 8 Static RAM Spec # REV. ** 38-14010 115225 1/17/02 ECN # Issue Date Orig. of Change MGN Description of Change New Datasheet

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